The present invention relates to a solid-state image pickup device such as, for example, a solid-state image pickup device that can realize low voltage operation and low power consumption, and a signal reading method therefor.
Conventionally, pulse-width modulation solid-state image pickup devices (e.g., see JP 58-179068 A) have been known as a solid-state image pickup device which outputs a signal corresponding to incident light as a pulse width signal.
An example of conventional pulse-width modulation solid-state image pickup devices is shown in FIG. 7. The pulse-width modulation solid-state image pickup device has unit cells, i.e. pixels, each composed of a photodiode 101, a reset transistor 102 for resetting the photodiode 101, and a comparator 103 for detecting a threshold value. An input terminal of the comparator 103 is connected to a cathode terminal 101a of the photodiode 101. An output terminal of the comparator 103 is connected to a counter circuit 105, and the counter circuit 105 is connected to a vertical signal line 107 via a vertical select transistor 106.
As the photodiode 101 performs photoelectric conversion of incident light, an output voltage Vpd outputted to the cathode terminal 101a varies as shown in a timing chart of FIG. 8. When the output voltage Vpd reaches a specified reference voltage Vt, an output signal Vout-op of the comparator 103 is inverted.
In this solid-state image pickup device, when a reset signal ΦRST is set to H level, the reset transistor 102 turns ON, causing the output voltage Vpd of the photodiode 101 to be reset to a reset voltage VPD. Next, by the reset signal ΦRST being set to L level, the photodiode 101 starts to store signal charges. Since the photodiode 101 generates signal charges by photoelectric conversion, the voltage of the cathode terminal 101a of the photodiode 101 lowers in response to the quantity of incident light. Then, at a time point when the electric potential (output voltage Vpd) of the input terminal of the comparator 103 reaches a reference voltage Vt, the output signal Vout-op of the comparator 103 changes from H to L level.
A time duration tx0 from when the photodiode 101 starts to store the signal charges until when the output voltage Vpd reaches the reference voltage Vt corresponds to the quantity of signal charges that the photodiode 101 has generated by photoelectric conversion.
During a period in which the output signal Vout-op of the comparator 103 is kept at H level, the counter circuit 105 performs a counting operation. By this counting operation, the counter circuit 105 performs analog-to-digital conversion within the pixel, and outputs in a read period a digital value resulting from the analog-to-digital conversion.
The counter circuit 105, when provided within a pixel as in this solid-state image pickup device, would cause the circuit scale of the pixel to be increased. Also, the time tx0 that it takes for the voltage (output voltage Vpd) of the cathode terminal 101a of the photodiode 101 to change from the specified reset voltage VPD to the reference voltage Vt of the comparator 103 within the pixel depends on the intensity of incident light.
Therefore, in a very dark state, for example, the time duration tx0 from the point of starting to store signal charges to the point of the output voltage Vpd reaching the reference voltage Vt becomes longer. This causes a long time to be taken for obtainment of a pulse signal given by the output signal Vout-op. As a result, it has been impossible to make a setting such that the pulse signal is generated during a given period.